Build a HEVC Intra prediction block on FPGA Board in Verilog

For this project, digital design background is necessary. A Verilog Hardware description Language is necessary to complete the design. Design of only Intra-prediction block of HEVC decoder in Verilog to implement it on FPGA Board. FPGA board should get a picture as input and output will be encoded picture. There is a reference software available online in C++ for complete HEVC Decoder, we can take that as reference to finish the design. It should be compatible with Xilinx Nexys video FPGA board. The input could be from a USB disk and output can be taken from HDMI already there in FPGA.