Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Verilog / VHDL Designers を採用する

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    14 仕事が見つかりました。次の価格: USD
    Need help in DSP project 6 日 left
    認証完了

    I need help in DSP(Digital signal processing) project

    $29 (Avg Bid)
    $29 平均入札額
    13 入札

    I have one zed board with ethernet on it. I one to display the output of the adder over the ethernet. Adder is not an issue you can download it from anywhere, should be in VHDL, then the output of the adder should be transferred to the ethernet and then use the telnet or putty to display the Output.

    $505 (Avg Bid)
    $505 平均入札額
    5 入札
    VHDL Expert needed -- 4 5 日 left
    認証完了

    communication between two usarts

    $111 (Avg Bid)
    $111 平均入札額
    2 入札

    I need vhdl code for uart to be implemented on basys 3 my budget is 150 usd max

    $108 (Avg Bid)
    $108 平均入札額
    13 入札

    I need a VHDL code of LVDS transmission between two FPGA`s. It is a 4 lane LVDS operating at 833.33MHz to transfer information from USART of 1st FPGA to USART of 2nd FPGA.

    $56 (Avg Bid)
    $56 平均入札額
    4 入札
    VHDL Expert needed 3 日 left
    認証完了

    I need to write VHDL code for LVDS transmission between two FPGAs. Please ping me if you are familiar with this.

    $30 (Avg Bid)
    $30 平均入札額
    3 入札
    $21 平均入札額
    7 入札

    Using the VHDL, design and implement the chips for data compression and data decompression shown in the following figure. The data compression chip will be implemented in the satellite to compress the data received from the telemetry subsystem in the satellite to reduce the communication time with the ground station. The data decompression chip will be implemented in the ground station in order to...

    $145 (Avg Bid)
    $145 平均入札額
    5 入札

    Looking for VLSI experts having strong digital electronics and verilog concepts

    $79 (Avg Bid)
    $79 平均入札額
    8 入札

    Looking for vlsi frontend experts with strong basics in digital electronics

    $14 (Avg Bid)
    $14 平均入札額
    5 入札

    design very simple basic snake game in quartus. Provide me with the verilog code ,state diagram, design schematic, all codes and instructions for self implementation.

    $6 / hr (Avg Bid)
    $6 / hr 平均入札額
    4 入札

    design very simple basic snake game in quartus. Provide me with the verilog code ,state diagram, design schematic, all codes and instructions for self implementation.

    $164 (Avg Bid)
    $164 平均入札額
    14 入札

    i just need the sd card initialization code to interface with pic16f877a couple of code lines thats it

    $28 (Avg Bid)
    $28 平均入札額
    5 入札
    AHB System verilog 23 時間 left

    I want implementation of AHB protocol using one master three slave architecture in Sytem verilog (test bench with generator, driver,monitor, scoreboard)

    $80 (Avg Bid)
    $80 平均入札額
    2 入札