LUT optimization of FFT
₹1500-12500 INR
着払い
Need to implement 16 point FFT in Verilog (Xillinx) , and use memory based LUT optimization , using the research paper attached to optimize the 16 point FFT, and compare the Area and Timing of both the optimized and un-optimized implementation.
Will need a small write-up comparing both the results , complete source code of both the implementations.
プロジェクトID: #18376382
プロジェクトについて
6人のフリーランサーが、平均₹10981 で、この仕事に入札しています。
Dear sir I have more than 10 years experience in digital design using Verilog, please check my profile, also please message me so that we can discuss Best regards
Hi, I hope you are doing well and enjoying digital design. I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. Throughout my 2+ years of experie もっと
Just two days ba only I did this, but to do this I struggle a lot. So now with a one day I give u code Relevant Skills and Experience Having experience of 7months in verilog