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    381 vlsi 仕事が見つかりました。次の価格: USD

    VLSI Implementation of a Cost-Efficient NearLossless CFA Image Compressor for Wireless Capsule Endoscopy

    $117 (Avg Bid)
    $117 平均入札額
    5 入札

    VLSI Implementation of a Cost-Efficient NearLossless CFA Image Compressor for Wireless Capsule Endoscopy

    $139 (Avg Bid)
    $139 平均入札額
    5 入札

    VLSI Implementation of a Cost-Efficient NearLossless CFA Image Compressor for Wireless Capsule Endoscopy

    $246 (Avg Bid)
    $246 平均入札額
    8 入札

    Need someone to teach VLSI front end design.

    $126 (Avg Bid)
    $126 平均入札額
    2 入札

    VLSI based consulting firm serving semiconductor manufacturing clients across India who mainly take microelectronic projects ,chip design etc looking for a suitable company name to start with

    $51 (Avg Bid)
    $51 平均入札額
    27 入札

    Full custom design of Sense Amplifier Half-Buffer for asynchronous VLSI Design.

    $191 (Avg Bid)
    $191 平均入札額
    3 入札

    i m looking technical content writer who can write detailed content for given project subjects In this Project We are making a a place where every one can get complete information including LAB sessions of Computer Science . we need writers/developers/freelancers who can develop detailed contents of given blow subjects of computer science . .NET and C# Programming 5G Data Networks Advance ...

    $5519 (Avg Bid)
    $5519 平均入札額
    22 入札

    I want to hire a person who has an experience in solving problems related to verilog in VLSI design(small work though),has to be experienced in handy usage of software like xilinx/[ログインしてURLを表示] for the problem and other info.

    $21 (Avg Bid)
    $21 平均入札額
    5 入札

    SHOW RELATED SAMPLES FIRST >>> Restructured project. We have a requirement to develop two devices. First device streams audio from an input device over Ethernet into a HomePlug module Second device connects to first HomePlug module and receives Ethernet stream, decodes audio stream and outputs to audibly. Looking for a developer with experience of the following: - HomePlug modules ...

    $250 - $750
    $250 - $750
    0 入札

    Need help in VLSI design Apart from the report, the WinSpice circuit files is also needed. If you have knowledge of above, let me know. I will share details with you.

    $30 - $50
    シール
    $30 - $50
    5 入札

    Nano Technology Vlsi Design Cadence, P-Spice, T-Spice Matlab

    $1 - $6 / hr
    $1 - $6 / hr
    0 入札

    I am currently running a company SARVAKARMA SOLUTIONS PVT LTD ([ログインしてURLを表示]) Now I have renamed the company to EXCEL VLSI TECHNOLOGIES PVT LTD. I want a new logo for new company name. We provide training services both for fresh ELectronic engineers and Semiconductor companies. Please refer the services in website ([ログインしてURLを表示])

    $17 (Avg Bid)
    $17 平均入札額
    20 入札

    We are from an online tutoring company One of our client wants assistance in his Project So , we are looking for a python or C++ expert with VLSI Fault Collapse and fault equivalent Budget is Rs.2000

    $8 - $21
    $8 - $21
    0 入札
    $9 / hr 平均入札額
    7 入札

    We are from an online tutoring company One of our client wants assistance in his Project So , we are looking for a python or C++ expert with VLSI Fault Collapse and fault equivalent Budget is Rs.2000

    $83 (Avg Bid)
    $83 平均入札額
    2 入札

    We are from an Online Tutoring company One of our client wants assistance in VLSI testing and verification Project in 2 steps This has to be sorted out in 3 hours If you are readily available now , you can bid this

    $133 (Avg Bid)
    $133 平均入札額
    3 入札

    I want to do projects related to design and verification in vlsi

    $25 / hr (Avg Bid)
    $25 / hr 平均入札額
    1 入札

    i am consultant and i need vlsi project consultant for few of project

    $67 (Avg Bid)
    $67 平均入札額
    7 入札

    I need someone to hello work on a VLSI design using Cadence Virtuso. Needs to be experienced. I will give details on chat. Please bid only if you can do Please, Don’t include the adder. In the published paper, there is two types of energy used as input, in my project I’m using only piezo, so just ignore the adder part. I am adding a picture which can help

    $27 (Avg Bid)
    $27 平均入札額
    1 入札

    I need someone to hello work on a VLSI design using mentor graphics or Cadence Virtuso. Needs to be experienced. I will give details on chat. Please bid only if you can do Please, Don’t include the adder. In the published paper, there is two types of energy used as input, in my project I’m using only piezo, so just ignore the adder part. I am adding a picture which can help

    $13 (Avg Bid)
    $13 平均入札額
    2 入札

    I need someone to hello work on a VLSI design using mentor graphics or Cadence Virtuso. Needs to be experienced. I will give details on chat. Please bid only if you can do Please, Don’t include the adder. In the published paper, there is two types of energy used as input, in my project I’m using only piezo, so just ignore the adder part. I am adding a picture which can help

    $27 (Avg Bid)
    $27 平均入札額
    2 入札

    I am looking for VLSI expert now. If you can do it, we can discuss in details on chat.

    $89 (Avg Bid)
    $89 平均入札額
    7 入札

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    $24 (Avg Bid)
    $24 平均入札額
    1 入札

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    $20 / hr (Avg Bid)
    $20 / hr 平均入札額
    1 入札

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    $39 (Avg Bid)
    $39 平均入札額
    3 入札

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    $3 / hr (Avg Bid)
    $3 / hr 平均入札額
    5 入札

    I need someone to hello work on a VLSI design using mentor graphics. Needs to be experienced. I will give details on chat. Please bid only if you can do

    $25 (Avg Bid)
    $25 平均入札額
    6 入札

    I need animated video with storyline or concept for promoting our VLSI institute in facebook and Youtube. This should be with audio . Sample : [ログインしてURLを表示] Note : Sample is only for reference .

    $79 (Avg Bid)
    $79 平均入札額
    7 入札

    Hi. I have a Terasic De1SoC and would like to learn how to use it. I am completely knew and have seen content from a similar project and interested on these topics About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design Implementing various encryption and decrypt algorithms SystemVerilog VMM Methodology OVM Methodology UVM Methodology I have C programming background

    $33 / hr (Avg Bid)
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    1 入札

    We have coded and designed a player based on the vs 1005 by vlsi. Now it is nearly finished and there are some small issues to fix. Later there will come more, but we need that for the first step and this is only a small task. The player shall be able to handle that the SD-card is changed. At the moment, when the card is pulled out and another is pushed in, the programm crashes. That shall be fixe...

    $32 (Avg Bid)
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    2 入札

    questions answer about: - Types of ASIC - Principle Programmable ASIC - Principle of ASIC design

    $38 (Avg Bid)
    $38 平均入札額
    5 入札

    I need animated video with storyline or concept for promoting our VLSI institute in facebook and Youtube. Sample : [ログインしてURLを表示] Note : Sample is only for reference .

    $54 (Avg Bid)
    $54 平均入札額
    13 入札

    To Teach : About VLSI Advanced Digital System Design VHDL Verilog RTL Design FPGA Design SystemVerilog VMM Methodology OVM Methodology UVM Methodology

    $105 (Avg Bid)
    $105 平均入札額
    5 入札
    Trophy icon Logo for COMSYS 終了 left

    The main objective of COMSYS is to present the latest research and results of scientists related to Machine learning, Computational Intelligence Track, VLSI, Networks and Systems Track, Computational Biology Track, Security Track topics. This conference provides opportunities for the different areas delegates to exchange new ideas and application experiences face to face, to establish business or ...

    $28 (Avg Bid)
    保証

    VLSI design for Reed Solomon FEC for 198,194 including documentation and explanation. Verilog files and simple testbench to prove the design. ASIC

    $115 (Avg Bid)
    $115 平均入札額
    9 入札
    FPGA VLSI DESIGN 終了 left

    FPGA implementation - implement lightweight block cipher (Lilliput, SFN)

    $91 (Avg Bid)
    $91 平均入札額
    7 入札

    I can help you in Vlsi or MATLAB projects

    $7 / hr (Avg Bid)
    $7 / hr 平均入札額
    1 入札
    VLSI Microwind. 終了 left

    part (a) is already done and attached below, looking for someone to do part (b) which is implementation of part (a) in microwind a. Design and implement the following circuit with four inputs and four outputs using CMOS transistors. • The first output is high when the binary value of the input is less than or equal to7 • The second output is high when the binary value of the input is b...

    $23 (Avg Bid)
    $23 平均入札額
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    b. Draw the mask layout with Ln = Lp= 0.6 μm, Wn= 4.8 μm and Wp= 8.4 μm using 0.6 μm technology. Also simulate the design using microwind tool and verify the outputs.

    $23 (Avg Bid)
    $23 平均入札額
    4 入札

    1. a. Design and implement the following circuit with four inputs and four outputs using CMOS transistors. • The first output is high when the binary value of the input is less than or equal to7 • The second output is high when the binary value of the input is between 5 and 12 • The third output is high when the binary value of the input is greater than or equal to 8 • The fou...

    $17 (Avg Bid)
    $17 平均入札額
    3 入札
    VLSI project. 終了 left

    Looking for an expert in VLSI a. Design and implement the following circuit with four inputs using CMOS transistors. The output is high if there are odd number of ones in the input The output is high if there are even number of ones in the input. The output if there is two consecutive ones in the input. b. Draw the mask layout with Ln = Lp= 0.6 μm, Wn= 4.2 μm and Wp= 10.2 μm using 0.6 &...

    $35 (Avg Bid)
    $35 平均入札額
    3 入札
    VLSI project 終了 left

    a. Design and implement the following circuit with four inputs using CMOS transistors. The output is high if there are odd number of ones in the input The output is high if there are even number of ones in the input. The output if there is two consecutive ones in the input. b. Draw the mask layout with Ln = Lp= 0.6 μm, Wn= 4.2 μm and Wp= 10.2 μm using 0.6 μm technology. Also simulate ...

    $53 (Avg Bid)
    $53 平均入札額
    3 入札

    SMEClabs is the research, development and training wing of SMEC, an ISO 9001:2008 certified global solution provider and the Authorized System Integrator of Schneider Electric, VAF, Kangrim boilers,Bosch Rexroth,DEIF,VARD ,Stx [ログインしてURLを表示] are in the field of Industrial, Oil and Gas and marine sector works since 2001. Training in Automation (PLC,SCADA,DCS C-300,HMI),Instrumentation, Embedded &a...

    $340 (Avg Bid)
    $340 平均入札額
    5 入札

    Hello Sir, I am MTech student in VLSI and embedded systems. I am doing my project on wearable glasses. I am using Texas instruments TMS320C5535 DSP processor for extraction of image from SD card and giving input to the DLPC 2607. Now I am stuck at the programming of DSP. What are your charges for making PCB with components and DSP programming? Pls let me know.

    $72 (Avg Bid)
    $72 平均入札額
    1 入札
    VLSI work.. 終了 left

    Design and analyze different MOS combinational logic circuits

    $30 (Avg Bid)
    $30 平均入札額
    6 入札

    I have some work related to VLSI Magic, Looking for a professional who can do this task in a very short time. I will share the details in chat

    $225 (Avg Bid)
    $225 平均入札額
    6 入札

    I have some work related to VLSI Magic, Looking for a professional who can do this task in a very short time. I will share the details in chat

    $35 (Avg Bid)
    $35 平均入札額
    1 入札

    Looking for engineer to do a project related to Magic VLSI and IRSIM. work is related to Encoders Multiplexers Demultiplexers Decoders etc will share the further details in chat

    $35 (Avg Bid)
    $35 平均入札額
    3 入札