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    595 project vlsi design 仕事が見つかりました。次の価格: USD

    I'm seeking a proficient trainer in VLSI LINT CDC to bring me up to speed with the basics and intricate concepts of VLSI design and CDC analysis. I am a beginner in this field and require comprehensive guidance. The desired training should enable me to: - Identify and fix clock domain crossing issues - Understand and utilize interactive training material - Simulate and validate my designs - Use LINT CDC and SpyGlass tools proficiently Key functionalities required in the trainer include: - Clock domain crossing analysis - SpyGlass tool integration - LINT CDC tool integration Ideal freelancers should have extensive experience in VLSI design, CDC analysis, and have expertise on SpyGlass and LINT CDC tools. A demonstrated ability to create educationa...

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    I am seeking expertise for my VLSI Magic project that requires: - High-complexity circuit design, calling for an in-depth understanding of intricate electronic circuit schematics. - Proficiency in logic synthesis, particularly in multi-level logic synthesis which is vital for my project. The ideal freelancer should possess advanced skills in VLSI design principles and significant experience in working with high-complexity circuits and multi-level logic synthesis. Understanding and utilizing advanced tools for creating and testing circuit designs is also a necessity.

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    VLSI Physical Design Project - Level of complexity: Low complexity - Design tool preference: Yes, the client has a specific design tool in mind - Expected timeline: 1-2 weeks Skills and Experience: - Proficiency in VLSI physical design - Experience with the specific design tool preferred by the client - Ability to work efficiently within a tight timeline -- You dont have to do the project , i will do it . Just need to assist me .

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    For my M.tech. First Sem Viva, I have to prepare a small module for this proposed project

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    I am in need of an experienced Electrical Engineer/VLSI/Circuit Designer to assist with the development of a screen-based product. The specific skills required for this project include VLSI Design. The complexity level of the design needed is advanced. Key requirements: - Strong background in VLSI Design and Circuit Design - Expertise in Electrical Engineering - Ability to develop complex designs for screen-based products - Familiarity with advanced circuitry and VLSI technologies This project does not have a strict deadline and can be completed flexibly. However, prompt delivery is desired. Please provide your estimated timeline for completion when submitting your proposal.

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    Hello there! I am looking for a skilled VLSI designer to assist me with my digital design project on Cadence virtuoso. The project is currently in the beginning stage and I require assistance in creating a digital design. Specific requirements for this project include: - Expertise in digital design on Cadence - Strong understanding of VLSI design principles and methodologies - Ability to work on a project of intermediate complexity Ideal skills and experience for this job include: - Proficiency in Cadence software - Experience in digital design projects - Knowledge of VLSI design techniques and tools You need to design a 16-bit carry-bypass adder in this project. The adder accepts...

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    Hello there! I am looking for a skilled VLSI designer to assist me with my digital design project on Cadence virtuoso. The project is currently in the beginning stage and I require assistance in creating a digital design. Specific requirements for this project include: - Expertise in digital design on Cadence - Strong understanding of VLSI design principles and methodologies - Ability to work on a project of intermediate complexity Ideal skills and experience for this job include: - Proficiency in Cadence software - Experience in digital design projects - Knowledge of VLSI design techniques and tools You need to design a 16-bit carry-bypass adder in this project. The adder accepts...

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    VLSI Project 終了 left

    VLSI design and implementation on Logisim, Modelsim, Magic ValSI layout tool and IRSIM

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    VLSI Project 終了 left

    VLSI Project using Logisim, Magic layout and IRSIM.

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    Develop a 4x4 multiplier. The multiplier uses a shift and add algorithm. The multiplier uses 2 phase clocking system (Using carry ripple adder) The inputs for the multiplier are A (A3, A2, A1, A0) and B ...follows 1. When Reset = 1 the system is reset 2. When start = 1 the following occurs a. Load A on the first phi1 b. Load B on the first phii1 c. After n cycles the output is stored in O and the Finish output is asserted d. There is no change to the output after subsequent cycles. -In this phase you are implement your project in (Magic.) Prepare a well organized and well written report that describes your design, and simulation results. Just to confirm, I want the project to be done on the Magic irsim program, with 2 phase clock and technology. I want it o...

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    High performance Digital Filter design . 1. VLSI implementation of Filter architecture. 2. Implementation of Filter architecture for all DSP functions on FPGA 3. Enhance the speed of Filter architecture using different technique and implementation on FPGA. 4 Reduce complexity, area, power consumption of filter architecture and implement on FPGA. 5 Minimum utilization of Look up Table, Flip Flops, slices etc for FPGA design of filter. 6) IP diagram 7) RTL design & Wave form for same 8) Fault Findings ( if possible and if any ) 9) If any other parameters which you can add to demonstrate results

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    documentation 終了 left

    ...technical specifications for a project that is of moderate technical complexity. The documentation should be in a Word document format. I'm looking for a technical writer experienced in VLSI who can interpret the photos I've shared and transform them into a comprehensive document, including the drawings. It is a Very Large Scale Integration (VLSI) project. This project requires detailed instruction and will be used as a reference for later use. It is important that the written instructions are clear and concise, making sure any potential user can understand. Also, the project needs to be completed in a timely manner and should be scalable for larger projects. The scope of the project should include all the menus, pages and fu...

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    ...embedded freelancer to assist with my personal project of designing an embedded system. Specific Project: - Embedded system design Purpose of the Embedded System: - Personal project Hardware and Software Requirements: - I have specific requirements Ideal Skills and Experience: • Good grasp of fundamentals in Electronics Engineering, • Knowledge of digital electronics, VLSI, microprocessor architecture is a plus • Interest and experience in digital design and verification • Good understanding of Assembly-level programming, Verilog/VHDL • Proficient in C/C++, and scripting languages - Strong knowledge and experience in ARM microcontroller programming - Proficiency in real-time operating system (RTOS) development - Ex...

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    I am looking for a freelancer who has experience in Test Engineering and Design for Testability (DFT) for a VLSI project. The ideal candidate will have a strong background in both DFT and Test Engineering. Scope of the project: - The project will involve both DFT and Test Engineering tasks. Desired outcome: - The desired outcome of the project is to achieve both improved test coverage and reduced test time. Required test cases: - The number of required test cases is not specified. Skills and experience: - Strong background in Test Engineering and DFT for VLSI projects. - Experience in improving test coverage and reducing test time. - Familiarity with test case creation and execution. - Knowledge of industry-standard tools and methodologi...

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    We used one design service comapny for one ASIC project, and they have completed the ASIC design and delivered whole design data with their environment to us. We don't have hands on ASIC design capability in house, we need somebody's help to re-build the design environment, install free window base verilg simulator. The consultant shoud re-build the design environment in our PC using window base free verilog simulator, and generate some vcd file for test house. Also, we need document that describes the design environment. I'm expcting it'll be 1 weeks project by experienced VLSI engineer, and shoud be done on site. we are located in Santa Clara, CA. we need NDA that'll be provided by us.

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    NDA
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    VLSI project logisim, irsim and magic tool. Documentation and the full workspace

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    VLSI Author 終了 left

    ...HackerKID is India’s first self-paced Gamified Coding and Learning platform which encourages kids to master cutting-edge technologies in-depth in a fun and challenging way, GUVI for corporates is a talent transformation suite that offers an efficient mode of training for employees with our excellent mentors. JOB DESCRIPTION: Role: Author Nature of Job: Freelancer Location: Remote Course name: VLSI Specialization: Subject Matter Expert Skills ● Course expertise ● Hands-on experience ● Teaching skills ● Presentation skills ● Communication skills ● Time management Responsibilities ● Providing sample videos and content plan/syllabus ● Providing pre-recorded, ready-to-launch videos according to the course guidelines framed by the company, post-approval, within the accepted t...

    $73 - $97 / hr
    $73 - $97 / hr
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    I need a docker file for all open source VLSI tools. All the tools are listed in below links, these links contains links of individual tools and the install/configure instructions are provided in respective links: 1. 2. 3. 4. 5. 6. 7. 8. List of tools in attachment that should be installed, environment variables configured, tested, and a document must be provided with tools, their locations etc. Make sure the tools are able to use the open

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    Design 4-bit Up binary ripple counter that counts from 0000 to 1111. Provide all timing diagrams for every counting from 0000 to 1111 in one increment at a time. Provide all timing delays using LTSPICE simulations for each count. Provide IRSIM to show the proper functions of the 4-Bit counter. You may find the gate level schematic and timing of the Up counter in the following links. There are many tutorials available on-line including YouTube. You may implement your design using D F/F or JK F/F; however, use the rising edge of the clock to make the timing counts. Synchronous Counter and the 4-bit Synchronous Counter () This is a hint for LTSPICE: For the parasitic extraction, follow exactly what it says in this

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    We are Hiring Technical expert (Xilinx Vivado) Position: Academic Technical expert Freelancer Experience: 2+ years Qualification: Masters or Doctorate in Electronics & Communication Engineering Skills Required: Turbo Decoder VLSI Xilinx Vivado FPGA Verilog Machine learning Specific area: Need a Verilog, Xilinx Vivado and Machine learning expert Time: Part-time/Freelance Job Description: Require a Freelancer, who can do coding will be done on Xilinx Vivado. Implementation will be done on FPGA using Verilog/ system Verilog language

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    ...source of any devices such as DSP, VLSI applications. For which, many electronics application devices used the high speed adders namely Parallel Prefix Adder (PPA). Generally, PP Adders have less delay due to its less waiting time of carry for next addition. But the area consumption is more, in which the performance of the adders will decrease for higher order bits’ addition. This paper is to design an area efficient Kogge Stone PPA which performs the parallel arithmetic operations in CMOS applications and analysed the design based on the parameters like area and power individually. The proposed area efficient KSA design used the Pass Transistor Logic (PTL) and analysed the performance of particular design. The Performance results of PTL with PP-...

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    Turbo codes are error correction codes that are widely used in communication codes exhibits high error correction capability as compared with other error correction codes. This paper proposes a Very Large Scale Integration (VLSI) architecture for the implementation of Turbo decoder. Soft-in-soft out decoders, interleavers and deinterleavers is used in the decoder side which employs Maximum-a-Posteriori (MAP) algorithm. The number of iterations required to decode the information bits being transmitted is reduced by the use of MAP algorithm. For the encoder part, this paper uses a system which contains two Recursive convolutional encoders along with pseudorandom interleaver in encoder Turbo encoding and decoding is done using Octave, Xilinx Vivado, Cadence system

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    The objective is to create a verilog code for image dehazing. The image is converted into a text file using Matlab(all pixel values are converted into corresponding hexadecimal values). This text file is given as the input to the verilog program. First we need to find the minimum of RGB value of each pixel and create a matrix. Then we need to consider a small window/mask in the new matri...entire new matrix to create the darkchannel image. Then by using the equations using the darkchannel prior algorithm we need to recreate a haze free image. (the output of the verilog code will be a text file and is recreated into an image using Matlab. I am attaching a reference paper. I just need to get the basic dehazing part from it. #verilog #matlab #imageprocessing #darkchannelprior #fpga #...

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    building an approximate 8x8 multiplier using a compressor and building any application-oriented

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    Assalam o alaikum!!! I am looking for Electrical Engineers with good expertise in following subjects: 1. Power Electronics 2. Control Systems 3. Electromagnetic Fields 4. VLSI Techniques 5. ASIC Design 6. Microwave communication and IoT 7. Multimedia communication and IoT 8. Antenna and wave propagation 9. Mobile and wireless communication 10. Artificial Intelligence 11. Industrial instrumentation I have multiple tasks in all above mentioned subjects. If you are a new freelancer but have good skills in anyone of the above mentioned subjects, feel free to contact me and I will hire you for long term basis.

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    vlsi uart 終了 left

    In uart design modify shift register

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    It is a IoT based project in which we are detecting many health parameters. we need a developer that is good to designing a chip or VLSI designer that can help us to make our project is compact in size.

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    I have its schematics, I just want the layout for the counter. There are couple of more layouts too which we can work together for. For each layout, I am willing to pay 40-50$ but it is super urgent

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    Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator. project paper will be uploaded . need the output expected like in the paper .

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    ASIC Acceleration for Graph Convolutional Neural Networks (GCNs) The task is to write a verilog code use that instantiates the GCN module. This verilog code check the correctness of the module with behavioral, post-synthesis, and post-Innovus Verilog netlists. Rest of the documents will be provided in the chat.

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    Hi Islam Muhammad S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

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    Hi Moaz Khaled Feriz K., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Dr Krishnanaik V., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Murali K., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

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    Hi Manish P., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Siti Nursyuhada M., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 - $7
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    0 入札

    Hi Razvan S., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Farkhondeh K., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 - $7
    $7 - $7
    0 入札

    Hi Mohcin M., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Tamas M., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Jahanzeb A., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Xiaotong L., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Hi Igor L., I noticed your profile and would like to offer you my project. We can discuss any details over chat. I noticed your profile and would like to offer you my project. We can discuss any details over chat. I actually wanted help in making a research paper. If you would be able to help make a paper for me , I'd be able to pay you based on it. I was aiming for a transactions paper in VLSI. Don't consider the budget given here, let us discuss and I'll try to comply with your budget.

    $7 (Avg Bid)
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    Simulation 終了 left

    Vlsi project implementation of IIR FILTER

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    I have attached the details below

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    Vlsi engineer 終了 left

    I have attached the details , i want to complete a project

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    Assalam o alaikum !!! We are looking for electrical engineers to join our team and work on different projects related to following domains of electrical engineering: 1) Control System 2) Satellite communication 3) Radio frequency and microwave circuit design 4) VLSI techniques 5) Radar theory and satellite communication 6) Intelligent and adaptive systems 7) Digital design 8) Asic design Freelancers must be proficient in following: 1) Matlab / Simulink 2) Proteus 3) Multisim 4) pspice 5) LTspice 6) VHDL/Verilog coding What I am expecting: 1. Dedication to the work 2. On time delivery of work without any delay 3. Well arranged and properly formatted reports with plagiarism count below 10%

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    thsi project need to be done in by the endo of the day or tomorrow morning. it needs to be done in LASI and winspice. for more info please follow the picture attatched

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    Assalam o alaikum !!! We are looking for electrical engineers to join our team and work on our projects related to different domains of electrical engineering like: 1) Control System 2) Satellite communication 3) Radio frequency and microwave circuit design 4) VLSI techniques 5) Radar theory and satellite communication 6) Intelligent and adaptive systems 7) Digital design 8) Asic design Freelancers must be proficient in following: 1) Matlab / Simulink 2) Proteus 3) Multisim 4) pspice 5) LTspice 6) VHDL/Verilog coding What I am expecting: 1. Dedication to the work 2. On time delivery of work without any delay 3. Well arranged and properly formatted reports with plagiarism count below 10%

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    VLSI السلام عليكم هذا حق الفيز ١ من بروجكت

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