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    1,874 need project fpga freelance 仕事が見つかりました。次の価格: USD

    Hi Ahmed M., As discussed find below points Change Request in UART2SPI project. 1. Instead of UART now data communication is on 3 wire. a. Clock b. Data c. Valid 2. Clock is 5MHz, data is of 8bit (1 byte), data should be read only when valid pin is high. ex:- For 256 bytes transmmission, first valid pin goes high , 256 bytes transmitted on data

    $110 (Avg Bid)
    $110 平均入札額
    1 入札

    more details will be given in the chat only serious expert and my maximum budget for this task is $100

    $55 (Avg Bid)
    $55 平均入札額
    21 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $1037 (Avg Bid)
    $1037 平均入札額
    4 入札
    PCIE FPGA PCB Design Revision 3 日 left
    認証完了

    We require a PCB designer familiar with gerber files and PCI Express FPGA designs. We have a reference design and we require the design simplifying so the board only provides the functions required to run our software as effective as possible.

    $231 (Avg Bid)
    $231 平均入札額
    10 入札

    hello, everyone i would like to hire fpga and verilog experts if you have experience on fpga, please bid on my project. thanks.

    $530 (Avg Bid)
    $530 平均入札額
    20 入札
    Essay Writing 9 時間 left

    Hardw...artificial neural networks, machine vision and other machine learning algorithms for robotics, internet of things and other data-intensive or sensor-driven tasks. • SW, GPU, FPGA, ASICs, Heterogeneous computing • Examples: • Virtual machines and environments for NN acceleration • Nvidia Volta/Tesla application for NN acceleration Es

    $55 (Avg Bid)
    $55 平均入札額
    50 入札

    The task is to develop the implementation of the keccak256 algorithm for FPGA XILINX xcku035-1ffva1156c. Verilog / VHDL development language (Xilinx Vivado Design Suite) Functional check on any available board. Requirements for implementation: 1. The algorithm should work in accordance with [ログインしてURLを表示]; a. The source can

    $625 (Avg Bid)
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    3 入札

    ...for someone who can design a FPGA based x16r miner to mine Cuckoo Cycle based coins like rvn. The design should be adaptable for possible changes in the x16r algorithm. Use vivado or other software make bitstream for vu9p fpga card with pcie,like xilinx vcu1525. make a miner software for ubuntu or windows. FPGA should be capable of mining with

    $5731 (Avg Bid)
    NDA
    $5731 平均入札額
    17 入札

    Hi somebody needed for find fpga (verilog-vhdl) remote projects I paid 20% commission for each project

    $462 (Avg Bid)
    $462 平均入札額
    10 入札

    Hi, I need a quick prototype for an Artix-7 based fpga that makes a pcie to sd card controller (SD host controller/SD bus). Objective is to have a fpga card (working on pcie screamer) recognized as a SD/MMC card reader under windows, I need Windows to recognize/be able to install the windows built-in sd card drivers for the card. I don’t need it to

    $429 (Avg Bid)
    $429 平均入札額
    3 入札

    Arduino that can record signal data and playback the data. it will be inline. I have a FPGA and an LCD. I need to record the signals coming from the FPGA to the LCD and recreate the signal to display on the LCD

    $53 (Avg Bid)
    $53 平均入札額
    8 入札

    I would like a board designed in Altium Designer, KiCAD or Eagle that is PIN compatible with the ZYBO Z7-20 board from diligent, but has only the essential circuitry required for RAM, Power, Jtag, and the CSI camera. Please and thank you.

    $15 - $25 / hr
    $15 - $25 / hr
    0 入札

    I would like a board designed in Altium Designer, KiCAD or Eagle that is PIN compatible with the ZYBO Z7-20 board from diligent, but has only the essential circuitry required for RAM, Power, Jtag, and the CSI camera. Please and thank you.

    $591 (Avg Bid)
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    26 入札

    GIVE ME SOME IDEAS ABOUT PROJECTS USING FPGA BOARD I need some ideas(NEARLY 10) for my projects by using [ログインしてURLを表示] is an electronics and communication engineering project.I need some new ideas. Give me an example idea for accepting the [ログインしてURLを表示] should use only fpga and some sensors only.

    $2018 (Avg Bid)
    $2018 平均入札額
    9 入札

    hi, everyone i would like to hire fpga and verilog expert if you have experience on fpga, please bid. thanks.

    $520 (Avg Bid)
    $520 平均入札額
    24 入札

    Hello I'm looking for a talented FPGA developer who have rich knowledge of C/C++, Python I have a machine using Huawei's FPGA used vu9p core and I am going to port x13bcd hash algorithm to this machine And I want at least 300mh/s with x13bcd but will increase double using x16R I am using Ubuntu and you can check your project via remote Other details would

    $1193 (Avg Bid)
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    14 入札

    i want you to do project for medical image fusion of CT scan and MRI using xilinix fpga

    $244 (Avg Bid)
    $244 平均入札額
    7 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $11854 (Avg Bid)
    $11854 平均入札額
    2 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $10386 (Avg Bid)
    $10386 平均入札額
    1 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $894 - $901
    $894 - $901
    0 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $882 - $882
    $882 - $882
    0 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $884 - $884
    $884 - $884
    0 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $896 (Avg Bid)
    $896 平均入札額
    3 入札

    ... ( Dont bid if you are not agree my terms) Hello /////////////////////////////////// ///////////////////////////////// ///////////////////////////// Looking for experienced FPGA programmer with Verilog skills that can develop bitstreams for BCU1525 (Xilinx VU9P) deployable on the Minerator shell. Equihash variants and X.. variants (x16r - requires changing

    $736 - $883
    $736 - $883
    0 入札

    ...N25Q256A13EF840E, IS66WVH8M8ALL-166B1LI, SN74LVC2G17.. Since the project is done in Altium, I need someone who master Altium Designer to connect a new EXP main connector to the FPGA. Some nets may be missing in schematics, you should manually add the net names to the schematics. Although the schematic need slight fix, the PCB's DRC is ok, no errror. The EXP conn...

    $180 (Avg Bid)
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    27 入札

    Hello, I have a set of ECG signal values in numeric form, I want to display them through Xlinx code and sen...through Xlinx code and send the same signal to network device through wifi. Please let me know if you can do it in 2 days. The code will not run on actual FPGA board, its just a simulation project. The code should run on xilinx ise software.

    $120 (Avg Bid)
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    2 入札

    FPGA XC6SLX25, Power source 12v. Connect PROM(at least 2 megabyte) and RAM(at least 100kilobyte) to FPGA and power

    $54 (Avg Bid)
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    FPGA project 終了 left

    i need someone to take a FPGA and make it compatible with a MIPI LCD.

    $227 (Avg Bid)
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    2 入札
    FPGA load Flash 終了 left

    loading a Xilinx SPI flash from external serial source using FPGA

    $360 (Avg Bid)
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    3 入札

    ...DE10-Nano board from Terasic. I am trying to changing the FPGA code DE10-Nano board to add our H/W interface to it. I have trouble to get the correct starting point for the FPGA that will be used with Linux. If you are expert with this board, please help us to provide support to us. Who am I: I am a FPGA design expert, but know nothing about DE10-Nano. I

    $27 / hr (Avg Bid)
    $27 / hr 平均入札額
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    This Project focuses on the use of VHDL language to describe a simple design and to verify its correct operation through test benches and simulations. The implementation on a specific FPGA has to allow also to obtain additional information of consumption, frequency of operation, etc. In short, it is a matter of following a design process as close to

    $741 (Avg Bid)
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    6 入札

    i already have the 90% of the code just need to finish 10% and guide me on running the code my my board

    $68 (Avg Bid)
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    8 入札

    this is fairly a simple project let make now if you ca do it i will attach files read that the budget is also good $200 and i need it asap

    $103 (Avg Bid)
    $103 平均入札額
    8 入札

    this is fairly a simple project let make now if you ca do it i will attach files read that the budget is also good $200 and i need it asap

    $144 (Avg Bid)
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    8 入札

    ...given two 256*256 synthesized & one SAR real time image. Implementation should be done in Matlab@Simulink and Xilinx@ System Generator environment. Implement above algorithm on FPGA Board & GPU. Simulation results should be demonstrated on MATLAB by comparing MATLAB result with Xilinx@ System Generator result for above specified 3 images with different

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    2 入札
    $335 平均入札額
    5 入札

    Our group wants to implement a game using altera de2 cyclone ii board. Please see the attached file for the details of the game to be implemented.

    $78 (Avg Bid)
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    3 入札

    Responsibilities: 1. Engaged in ARM embedded software development (zynq7000 platform development); 2. Debugging WiFi driver and USB driver 3. Build and compile the ke... Build and compile the kernel driver environment 4. Realize the interaction between PS and PL 5. Porting algorithms to embedded platforms (including but not limited to ARM, FPGA, etc.)

    $2499 (Avg Bid)
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    15 入札

    The parking system has 4 levels, level 1 for admins and disabled, level 2 for staff and disabled, level 3 for visitors and disabled, level 4 for visitors.. we two gates in each level (the gate is a pair of IR sensor) , one gate for entrance and the other for exit.. moreover we have camera and monitor near the entrance gate of level 1 , the camera detects the type of car that entering the parking a...

    $88 (Avg Bid)
    $88 平均入札額
    5 入札

    The parking system has 4 levels, level 1 for admins and disabled, level 2 for staff and disabled, level 3 for visitors and disabled, level 4 for visitors.. we two gates in each level (the gate is a pair of IR sensor) , one gate for entrance and the other for exit.. moreover we have camera and monitor near the entrance gate of level 1 , the camera detects the type of car that entering the parking a...

    $179 (Avg Bid)
    $179 平均入札額
    7 入札

    I need a LabVied VI that can do realtime LTC Timecode deconding and encoding. this will be run on an MyRIO unit so should either be written for this or easily ported from another DAQ system. Ideally it would utilise the RT Module and FPGA Module and operate with as little overhead as possible. The VI should be able the, in terms of the decoder, output

    $350 (Avg Bid)
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    5 入札

    Need help program FPGA with Artix-7 using Verliog.

    $125 (Avg Bid)
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    5 入札
    $20 / hr 平均入札額
    3 入札

    ARM firmware with LINUX for DE10-Nano board A. Play with the evaluation board 1. Project Owner will provide a P0496 ARM Processor base on Cyclone V SE FPGA computer board (DE10-Nano board). The board will have Ethernet port and SD card. 2. Developer needs to prepare LINUX Kernel to run on embedded computer board with Ethernet TCP/IP to connect with

    $4046 (Avg Bid)
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    21 入札

    Hey, I need help with Verilog / Vivado FPGA project. I'll send you details.

    $175 (Avg Bid)
    $175 平均入札額
    1 入札

    Implement the Zen Protocol in the FPGA and update the Mining App

    $1220 (Avg Bid)
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    3 入札

    Need help program FPGA to communicate with TI7200 through SPI, and generate 300 and 100 Hz sine waves to drive two electric coils,

    $529 (Avg Bid)
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    15 入札
    FPGA Designing 終了 left

    Hello, I need FPGA designing expert. I have complete details of the project. Place your bids, i will share the details with the best bidder. Thank you in advance

    $56 (Avg Bid)
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    14 入札